- 专利标题： Packetized power-on-self-test controller for built-in self-test
-
申请号： US17449548申请日： 2021-09-30
-
公开(公告)号： US11626178B2公开(公告)日： 2023-04-11
- 发明人: Anubhav Sinha , Ramalingam Kolisetti , Amit Gopal M. Purohit , Sai Manish Rao Marru , Sahil Soni , Salvatore Talluto
- 申请人： Synopsys, Inc.
- 申请人地址： US CA Mountain View
- 专利权人： Synopsys, Inc.
- 当前专利权人： Synopsys, Inc.
- 当前专利权人地址： US CA Mountain View
- 代理机构： Patterson + Sheridan, LLP
- 优先权： IN202041042929 20201002
- 主分类号： G11C29/00
- IPC分类号： G11C29/00 ; G11C29/10 ; G11C29/46 ; G11C29/36
摘要：
Techniques for testing an integrated circuit (IC) are disclosed. A controller in the IC retrieves first testing data from a first memory in the IC. The controller transmits the first testing data to a first built-in self-test (BIST) core. The controller receives a response from the first BIST core, relating to a test at the first BIST core using the first testing data. The controller determines a status of the test relating to the IC based on the response.
公开/授权文献
信息查询
