A semiconductor memory device includes: a stack above a peripheral circuit on a first substrate, in which first conductive layers and first insulation layers are alternately stacked in a first direction each; a first pillar through the stack, in which a semiconductor layer and each first conductive layer form a memory cell at their intersection; a second substrate including a first region above the stack and the first pillar, being connected to a semiconductor layer, and a second region juxtaposed with the first region in a second direction; a second insulation layer through the second substrate, insulating the regions from each other; and a second conductive layer including a first portion through the second substrate, and a second portion extending in the second direction above the second substrate and including a part defining a bonding pad. The second portion overlaps with the second insulation layer in the first direction.