Invention Grant
- Patent Title: Power and area efficient digital-to-time converter with improved stability
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Application No.: US17449250Application Date: 2021-09-28
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Publication No.: US11626883B2Publication Date: 2023-04-11
- Inventor: Zhengzheng Wu , Chao Song , Karthik Nagarajan
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: H03M1/06
- IPC: H03M1/06 ; H03M1/82 ; G04F10/00 ; H03K5/24 ; H03M1/80

Abstract:
A digital-to-time converter (DTC) converts a digital code into a time delay using a capacitor digital-to-analog converter (CDAC) that functions as a charging capacitor. The DTC includes a switched capacitor voltage-to-current converter for the formation of a charging current (or a discharging current) for charging (or for discharging) the charging capacitor responsive to a triggering clock edge that begins the time delay. A comparator compares a voltage on the charging capacitor to a threshold voltage to determine an end of the time delay.
Public/Granted literature
- US20220182065A1 POWER AND AREA EFFICIENT DIGITAL-TO-TIME CONVERTER WITH IMPROVED STABILITY Public/Granted day:2022-06-09
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