Invention Grant
- Patent Title: Electrically isolated gate contact in FINFET technology for camouflaging integrated circuits from reverse engineering
-
Application No.: US17157567Application Date: 2021-01-25
-
Publication No.: US11637076B2Publication Date: 2023-04-25
- Inventor: Lap Wai Chow , Bryan J. Wang , James P. Baukus , Ronald P. Cocchi
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Agency: Gates & Cooper LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L29/417 ; H01L29/423 ; H01L29/66

Abstract:
A system and method for adding a source contact, a drain contact, and an apparent gate contact to a FinFET having a fin including a source region, a drain region, and a gate disposed over the fin forming one or more transistor junctions with the fin. The method comprises producing a source contact opening extending downward to a first region electrically coupled to the source region, a drain contact opening extending downward to a second region electrically coupled to the drain region, and a gate contact opening extending downward to a third region electrically isolated from the gate, and filling the source contact opening, the drain contact opening, and the gate contact opening with a conductive metal.
Public/Granted literature
Information query
IPC分类: