Invention Grant
- Patent Title: Memory array and method used in forming a memory array comprising strings of memory cells
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Application No.: US17091420Application Date: 2020-11-06
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Publication No.: US11659708B2Publication Date: 2023-05-23
- Inventor: John D. Hopkins , Nancy M. Lomeli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11582
- IPC: H01L27/11582

Abstract:
A memory array comprises a conductor tier comprising upper conductor material directly above and directly electrically coupled to lower conductor material. The upper and lower conductor materials comprise different compositions relative one another. Laterally-spaced memory blocks individually comprising a vertical stack comprise alternating insulative tiers and conductive tiers, Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers and through the upper conductor material into the lower conductor material. The channel material of the channel-material strings is directly electrically coupled to the upper and lower conductor materials of the conductor tier. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. Other embodiments, including method, are disclosed.
Public/Granted literature
- US20220149061A1 Memory Array And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells Public/Granted day:2022-05-12
Information query
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