Invention Grant
- Patent Title: Semiconductor device assembly with embossed solder mask having non-planar features and associated methods and systems
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Application No.: US17021364Application Date: 2020-09-15
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Publication No.: US11688706B2Publication Date: 2023-06-27
- Inventor: Jungbae Lee
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/00 ; H01L21/60

Abstract:
Embossed solder masks for a semiconductor device assembly, and associated methods and systems are disclosed. In one embodiment, a package substrate includes the solder mask with non-planar features along a surface of the solder mask such that the area of the surface is increased. The non-planar features may correspond to concave recesses formed on the surface of the solder mask. Physical dimensions (e.g., widths, depths) and/or areal densities of the non-planar features of the embossed solder masks may vary based on local areas of the package substrate exclusive of conductive bumps. The non-planar features may be formed by pressing a mold having convex features against the surface of the solder mask. The solder mask may be heated while pressing the mold against the surface of the solder mask. In some embodiments, the mold includes regions lacking the convex features.
Public/Granted literature
- US20220084971A1 SEMICONDUCTOR DEVICE ASSEMBLY WITH EMBOSSED SOLDER MASK AND ASSOCIATED METHODS AND SYSTEMS Public/Granted day:2022-03-17
Information query
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