Invention Grant
- Patent Title: LDO overshoot protection in a cascaded architecture
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Application No.: US16810639Application Date: 2020-03-05
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Publication No.: US11703897B2Publication Date: 2023-07-18
- Inventor: Michel Cuenca , Bruno Gailhard , Daniele Mangano
- Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Rousset) SAS
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.,STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics S.r.l.,STMicroelectronics (Rousset) SAS
- Current Assignee Address: IT Agrate Brianza; FR Rousset
- Agency: Slater Matsil, LLP
- Main IPC: G05F1/56
- IPC: G05F1/56

Abstract:
In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.
Public/Granted literature
- US20210278868A1 LDO OVERSHOOT PROTECTION Public/Granted day:2021-09-09
Information query
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