Invention Grant
- Patent Title: Data storage structure for improving memory cell reliability
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Application No.: US17718424Application Date: 2022-04-12
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Publication No.: US11716913B2Publication Date: 2023-08-01
- Inventor: Hai-Dang Trinh , Chii-Ming Wu , Cheng-Yuan Tsai , Tzu-Chung Tsai , Fa-Shen Jiang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US16788611 2020.02.12
- Main IPC: H10N70/00
- IPC: H10N70/00 ; H10N70/20

Abstract:
Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming a lower conductive structure over a substrate. A data storage structure is formed on the lower conductive structure. A bandgap of the data storage structure discretely increases or decreases at least two times from a top surface of the data storage structure in a direction towards the substrate. An upper conductive structure is formed on the data storage structure.
Public/Granted literature
- US20220238802A1 DATA STORAGE STRUCTURE FOR IMPROVING MEMORY CELL RELIABILITY Public/Granted day:2022-07-28
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