Invention Grant
- Patent Title: Substrate including semiconductors arranged in a matrix and a display device
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Application No.: US17148944Application Date: 2021-01-14
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Publication No.: US11719986B2Publication Date: 2023-08-08
- Inventor: Kazuhide Mochizuki , Hitoshi Tanaka
- Applicant: Japan Display Inc.
- Applicant Address: JP Tokyo
- Assignee: Japan Display Inc.
- Current Assignee: Japan Display Inc.
- Current Assignee Address: JP Tokyo
- Agency: Maier & Maier, PLLC
- Priority: JP 17008619 2017.01.20
- Main IPC: G02F1/1362
- IPC: G02F1/1362 ; G02F1/1368 ; H01L27/12 ; G02F1/1345 ; H01L29/786

Abstract:
According to one embodiment, a display device including an insulating substrate, a first gate driver, a first gate line and a conductive material layer is provided. The first gate line has a first end connected to the first gate driver and a second end opposite to the first end, and extends in a first direction. The conductive material layer is located between the insulating substrate and the first gate line, overlaps the first gate line, and extends in the first direction. In the display device, the second end of the first gate line is electrically connected to the conductive material layer.
Public/Granted literature
- US20210132451A1 SUBSTRATE INCLUDING SEMICONDUCTORS ARRANGED IN A MATRIX AND A DISPLAY DEVICE Public/Granted day:2021-05-06
Information query
IPC分类: