System for error detection and correction in a multi-thread processor
Abstract:
A system for detecting errors and correcting errors in a multi-thread processor is disclosed. The multi-thread processor includes a first processor and a second processor. First processor executes a first thread and a second thread. Second processor executes a third thread and fourth thread. An instruction execution is initiated in all four threads. Output of the instruction execution from all four threads are compared for a match by a data compare engine to detect an error in execution of the instruction. When output of the instruction execution from one of the four threads does not match, an error in execution is detected and the output is replaced by one of the other three threads whose output does match. When output of the instruction execution by two or more threads does not match, error is detected, but not corrected.
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