- 专利标题: High-voltage transmission gate architecture
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申请号: US17673372申请日: 2022-02-16
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公开(公告)号: US11742848B1公开(公告)日: 2023-08-29
- 发明人: Buddhika Abesingha , Gregory Szczeszynski
- 申请人: pSemi Corporation
- 申请人地址: US CA San Diego
- 专利权人: pSemi Corporation
- 当前专利权人: pSemi Corporation
- 当前专利权人地址: US CA San Diego
- 代理机构: Steinfl + Bruno LLP
- 主分类号: H03K17/567
- IPC分类号: H03K17/567 ; H03K17/00
摘要:
Circuits and methods for transmitting high-voltage (HV) static and/or switching signals via a high-voltage (HV) transmission gate controllable via low-voltage (LV) logic are presented. The HV gate includes a biasing circuit for generating a biasing voltage to gates of two series-connected HV transistors. According to one aspect, the biasing voltage is generated through a pull-up device coupled to a HV supply having a voltage level higher than a high voltage of a signal to be transmitted. According to another aspect, the biasing voltage is generated through a LV supply coupled to a diode, and a capacitor coupled between the gates and the sources of the HV transistors. When the gate is activated, the combination of the LV supply coupled to the diode and the capacitor generates a biasing voltage based on a sum of a voltage of the LV supply and an instantaneous voltage level of the signal being transmitted.
公开/授权文献
- US20230261652A1 HIGH-VOLTAGE TRANSMISSION GATE ARCHITECTURE 公开/授权日:2023-08-17
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