公开(公告)号：US20240364269A1

公开(公告)日：2024-10-31

申请号：US18653486

申请日：2024-05-02

申请人： pSemi Corporation

发明人： Emre Ayranci ,  Miles Sanner

IPC分类号： H03F1/02 ,  H03F1/08 ,  H03F1/56 ,  H03F3/193 ,  H03F3/195 ,  H03F3/72

CPC分类号： H03F1/0277 ,  H03F1/086 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/18 ,  H03F2200/213 ,  H03F2200/222 ,  H03F2200/225 ,  H03F2200/243 ,  H03F2200/252 ,  H03F2200/294 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/306 ,  H03F2200/321 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/411 ,  H03F2200/42 ,  H03F2200/429 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/525 ,  H03F2200/61 ,  H03F2200/75 ,  H03F2203/7206 ,  H03F2203/7209 ,  H03F2203/7233

摘要： A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

公开(公告)号：US20240356434A1

公开(公告)日：2024-10-24

申请号：US18658746

申请日：2024-05-08

申请人： pSemi Corporation

发明人： Robert Mark Englekirk

IPC分类号： H02M3/07 ,  H02M1/00

CPC分类号： H02M3/07 ,  H02M1/0045

摘要： Circuits and methods that can rapidly detect voltage degradation in a positive charge pump output and discharge control node accumulated charge (CNAC), thereby forcing the positive charge pump into a high-power mode. Embodiments include circuitry configured to provide a load current to a positive charge pump, including a low-dropout regulator (LDO) having a pass device that includes a control input, and a rapid charge transfer circuit coupled to the control input of the pass device and configured to be coupled to a source of a trigger voltage, the rapid charge transfer circuit configured to transfer a charge to or from the control input of the pass device when the trigger voltage falls sufficiently below a specified level so as to rapidly place the pass device in a higher conduction state, and to automatically cease to provide the transfer the charge after a settable amount of time.

公开(公告)号：US20240322760A1

公开(公告)日：2024-09-26

申请号：US18406724

申请日：2024-01-08

申请人： pSemi Corporation

发明人： Tero Tapio Ranta ,  Christopher C. Murphy ,  Jeffrey A. Dykstra

IPC分类号： H03F1/22 ,  H03F1/02 ,  H03F1/30 ,  H03F1/32 ,  H03F1/56 ,  H03F3/16 ,  H03F3/193 ,  H03F3/195 ,  H03F3/213

CPC分类号： H03F1/22 ,  H03F1/0227 ,  H03F1/223 ,  H03F1/301 ,  H03F1/3205 ,  H03F1/3247 ,  H03F1/56 ,  H03F3/16 ,  H03F3/193 ,  H03F3/195 ,  H03F3/213 ,  H03F1/302 ,  H03F2200/18

摘要： Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

公开(公告)号：US12101065B2

公开(公告)日：2024-09-24

申请号：US18492544

申请日：2023-10-23

申请人： pSemi Corporation

发明人： Miles Sanner ,  Emre Ayranci ,  Parvez Daruwalla

IPC分类号： H03F1/22 ,  H03F3/193 ,  H03F3/21

CPC分类号： H03F1/223 ,  H03F3/193 ,  H03F3/21 ,  H03F2200/294 ,  H03F2203/7236

摘要： Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

公开(公告)号：US12100707B2

公开(公告)日：2024-09-24

申请号：US18447200

申请日：2023-08-09

申请人： pSemi Corporation

发明人： Befruz Tasbas ,  Simon Edward Willard ,  Alain Duvallet ,  Sinan Goktepeli

IPC分类号： H01L27/092 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06 ,  H01L29/45

CPC分类号： H01L27/092 ,  H01L21/823475 ,  H01L21/823481 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/45

摘要： Systems, methods, and apparatus for an improved protection from charge injection into layers of a device using resistive structures are described. Such resistive structures, named s-contacts, can be made using simpler fabrication methods and less fabrication steps. In a case of metal-oxide-semiconductor (MOS) field effect transistors (FETs), s-contacts can be made with direct connection, or resistive connection, to all regions of the transistors, including the source region, the drain region and the gate.

公开(公告)号：US12074217B2

公开(公告)日：2024-08-27

申请号：US17206436

申请日：2021-03-19

申请人： pSemi Corporation

发明人： Christopher N. Brindle ,  Jie Deng ,  Alper Genc ,  Chieh-Kai Yang

IPC分类号： H01L29/36 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H01L49/02 ,  H03K17/16

CPC分类号： H01L29/7841 ,  H01L27/1203 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/0688 ,  H01L29/0847 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/4908 ,  H01L29/78615 ,  H01L29/78654 ,  H01L29/78657 ,  H03K17/162

摘要： A method and apparatus for use in improving linearity sensitivity of MOSFET devices having an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to address degradation in second- and third-order intermodulation harmonic distortion at a desired range of operating voltage in devices employing an accumulated charge sink.

公开(公告)号：US20240275375A1

公开(公告)日：2024-08-15

申请号：US18627386

申请日：2024-04-04

申请人： pSemi Corporation

发明人： Buddhika ABESINGHA

IPC分类号： H03K17/16 ,  H03K17/687

CPC分类号： H03K17/161 ,  H03K17/165 ,  H03K17/687

摘要： Various methods and circuital arrangements for leakage reduction in MOS devices are presented. A pull-up circuit is selectively coupled to a gate of the MOS device to provide control of a voltage to the gate that is larger than a source voltage. Voltage switching circuits selectively couple different voltages to the body and/or back-gate terminals of the MOS device. During a standby mode of operation, the leakage current of the MOS device is decreased by driving the MOS device further into its subthreshold leakage region. During standby mode, a threshold voltage of the MOS device is increased by coupling a voltage higher than the source voltage to the body and/or back-gate terminals. The MOS device can be a pass device used in low dropout regulator (LDO). During standby mode, the LDO maintains output regulation by driving the MOS device further into its subthreshold leakage region and/or increasing the threshold voltage.

公开(公告)号：US20240274551A1

公开(公告)日：2024-08-15

申请号：US18585653

申请日：2024-02-23

申请人： pSemi Corporation

发明人： William R. Smith, JR. ,  Jaroslaw Adamski ,  Dan William Nobbe ,  Edward Nicholas Comfoltey ,  Jingbo Wang

IPC分类号： H01L23/66 ,  H03H7/01 ,  H03H7/06 ,  H03H7/12

CPC分类号： H01L23/66 ,  H03H7/01 ,  H03H7/0153 ,  H03H7/06 ,  H03H7/12 ,  H03H7/1758 ,  H01L2223/6672 ,  H01L2924/0002 ,  H03H2007/013 ,  H03H2210/036 ,  Y10T29/4913

摘要： An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

公开(公告)号：US20240272664A1

公开(公告)日：2024-08-15

申请号：US18427594

申请日：2024-01-30

申请人： pSemi Corporation

发明人： Robert Mark Englekirk

IPC分类号： G05F1/565 ,  G05F3/26

CPC分类号： G05F1/565 ,  G05F3/262

摘要： Circuits and methods that compensate for the problems created by low-dropout regulator (LDO) leakage current, particularly when stressed. Embodiments include an improved LDO configured to provide a load current, and which includes a leakage current compensation circuit. The leakage current compensation circuit generates a compensating current that offsets the leakage current through the pass device of the LDO during conditions that induce such leakage. More specifically, the leakage current compensation circuit can replicate the leakage current of the pass device of the LDO and feed a compensating current back into the LDO from a current mirror circuit while drawing zero-power during normal use, when leakage current is absent. LDO circuits that include a leakage current compensation circuit are particularly useful as voltage sources for positive or negative charge pumps, but are also quite useful in applications requiring a regulated voltage output.

公开(公告)号：US12062973B2

公开(公告)日：2024-08-13

申请号：US17656549

申请日：2022-03-25

申请人： pSemi Corporation

发明人： Tim Wen Hui Yu ,  Gregory Szczeszynski

IPC分类号： H02M1/00

CPC分类号： H02M1/0006 ,  H02M1/0009

摘要： An integrated circuit (IC) for controlling a power converter. The IC includes a controller that, in a first sensing period, enables a sensing circuit of the power converter and electrically connects an output node of an op amp of the sensing circuit and a first node of a capacitor of the sensing circuit, creating a first voltage across the capacitor; in a period between the first sensing period and a second sensing period, disables the sensing circuit and disconnects the output node of the op amp and the first node of the capacitor to maintain the first voltage across the capacitor; and in the second sensing period, enables the sensing circuit and connects the output node of the op amp and the first node of the capacitor, the maintained first voltage across the capacitor reducing a settling time for the enabled sensing circuit.