Invention Grant
- Patent Title: Vertical memory devices and methods of manufacturing the same
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Application No.: US17173179Application Date: 2021-02-10
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Publication No.: US11744077B2Publication Date: 2023-08-29
- Inventor: Sangmin Kang , Hanvit Yang , Jihoon Choi
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR 20200069614 2020.06.09
- Main IPC: H10B43/27
- IPC: H10B43/27 ; H10B43/35

Abstract:
A mold including insulation layers and sacrificial layers is formed on a substrate. A channel hole is formed through the mold. A first deposition process is performed using a first precursor including silane and a second precursor including silane and a halogen element to form a first preliminary blocking layer on a sidewall of the channel hole. A second deposition process is performed using the first precursor to form a second preliminary blocking layer on the sidewall of the channel hole. The first and second preliminary blocking layers form a third preliminary blocking layer. An oxidation process is performed on the third preliminary blocking layer to transform the third preliminary blocking into a first blocking layer. A charge storage layer, a tunnel insulation layer, and a channel layer are formed on the first blocking layer. The sacrificial layer is replaced with a gate electrode.
Public/Granted literature
- US20210384200A1 VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2021-12-09
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