- 专利标题: Integrated circuit with constrained metal line arrangement
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申请号: US17342006申请日: 2021-06-08
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公开(公告)号: US11748550B2公开(公告)日: 2023-09-05
- 发明人: XinYong Wang , Qiquan Wang , Li-Chun Tien , Yuan Ma
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. , TSMC CHINA COMPANY, LIMITED
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,TSMC CHINA COMPANY, LIMITED
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,TSMC CHINA COMPANY, LIMITED
- 当前专利权人地址: TW Hsinchu; CN Shanghai
- 代理机构: Hauptman Ham, LLP
- 优先权: CN 1910974639.2 2019.10.14
- 主分类号: G06F30/398
- IPC分类号: G06F30/398 ; H05K1/02 ; G06F30/394
摘要:
A method includes steps of dividing a first arrangement of metal lines in a circuit layout into two sets of metal lines, a first set of metal lines in a peripheral area, and a second set of metal lines in a center area. The arrangement of metal lines is configured to electrically connect to contacts of a second layer of the circuit layout. The method includes adjusting a metal line perimeter of at least one metal line in the center area to make a second arrangement of metal lines, where each adjusted metal line perimeter is separated from contacts in the second layer of the integrated circuit layout by at least a check distance.
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