Invention Grant
- Patent Title: Semiconductor device including multiplier circuit
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Application No.: US17673932Application Date: 2022-02-17
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Publication No.: US11755285B2Publication Date: 2023-09-12
- Inventor: Shunpei Yamazaki , Hajime Kimura , Takahiro Fukutome
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: ROBINSON INTELLECTUAL PROPERTY LAW OFFICE
- Agent Eric J. Robinson
- Priority: JP 17221455 2017.11.17 JP 18027238 2018.02.19
- Main IPC: G06G7/16
- IPC: G06G7/16 ; G06F7/499 ; G06F7/501 ; G06F7/57 ; G06F9/30

Abstract:
A semiconductor device including a multiplier circuit is provided. A first cell, a second cell, and a first circuit are included. The first cell includes a first transistor. The second cell includes a second transistor. The first circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor, and a first switch.
Public/Granted literature
- US20220179621A1 ADDITION METHOD, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE Public/Granted day:2022-06-09
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