Invention Grant
- Patent Title: Logic circuit and semiconductor device
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Application No.: US17980693Application Date: 2022-11-04
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Publication No.: US11756966B2Publication Date: 2023-09-12
- Inventor: Shunpei Yamazaki , Jun Koyama , Masashi Tsubuku , Kosei Noda
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: ROBINSON INTELLECTUAL PROPERTY LAW OFFICE
- Agent Eric J. Robinson
- Priority: JP 09238918 2009.10.16
- Main IPC: H01L27/12
- IPC: H01L27/12 ; G09G3/20 ; H01L29/786 ; G09G3/36 ; G09G3/3233 ; G09G3/3291 ; H03K19/003 ; H03K19/096 ; G11C19/28 ; H03K17/16 ; G11C19/18

Abstract:
To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.
Public/Granted literature
- US20230064813A1 LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE Public/Granted day:2023-03-02
Information query
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