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公开(公告)号：US20240212774A1
公开(公告)日：2024-06-27
申请号：US18596906
申请日：2024-03-06
发明人： Seiko AMANO , Kouhei TOYOTAKA , Hiroyuki MIYAKE , Aya MIYAZAKI , Hideaki SHISHIDO , Koji KUSUNOKI
CPC分类号： G11C19/28 , G09G3/3677 , G09G3/3696 , G11C19/184 , H01L25/03 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/127 , H01L27/1288 , H03K19/0013 , H05K7/02 , G09G2300/0809 , G09G2310/0286 , H01L2924/0002
摘要： An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号：US20240169951A1
公开(公告)日：2024-05-23
申请号：US18522347
申请日：2023-11-29
发明人： Atsushi Umezaki
CPC分类号： G09G3/3677 , G09G3/3648 , G11C19/184 , G11C19/28 , H01L27/1225 , G09G2300/0809 , G09G2310/0286
摘要： To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.
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公开(公告)号：US20230326538A1
公开(公告)日：2023-10-12
申请号：US18206702
申请日：2023-06-07
发明人： Atsushi UMEZAKI
IPC分类号： G11C19/18 , H01L29/786 , H01L27/12 , G09G3/3266 , G09G3/36
CPC分类号： G11C19/184 , H01L29/7869 , H01L27/1225 , G09G3/3266 , G09G3/3677 , G09G2300/0426 , G09G2340/0492 , G09G2310/0286
摘要： A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
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公开(公告)号：US11749156B2
公开(公告)日：2023-09-05
申请号：US17373143
申请日：2021-07-12
发明人： Can Zheng
CPC分类号： G09G3/20 , G11C19/184 , G11C19/28 , G09G2310/0267 , G09G2310/0286
摘要： A shift register and driving method thereof, a gate driving circuit and a display device are provided. The shift register includes a first input unit, a second input unit, a pull-up control unit, a pull-down control unit, an output control unit and an output reset unit, wherein the first input unit, the second input unit, the pull-up control unit, the pull-down control unit and the output control unit are coupled to a first node, and the pull-up control unit, the pull-down control unit and the output reset unit are coupled to a second node.
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公开(公告)号：US20230215397A1
公开(公告)日：2023-07-06
申请号：US18120489
申请日：2023-03-13
发明人： Atsushi Umezaki
CPC分类号： G09G3/3677 , H01L27/1225 , G11C19/28 , G09G3/3648 , G11C19/184 , G09G2300/0809 , G09G2310/0286
摘要： To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.
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公开(公告)号：US20230052659A1
公开(公告)日：2023-02-16
申请号：US17646299
申请日：2021-12-29
发明人： Hong-Ru CHOU , Wen-Chih FANG , Yung-Le CHANG , Bo-Cheng LIN
摘要： A signal processing method includes the following operations: receiving an input signal and analyzing the input signal to generate a plurality of bit codes by a signal receiving circuit; temporarily storing a first part of the plurality of bit codes according to a time sequence by a shift register and starting a decoder when the shift register is full; and performing a boundary calibration according to the first part of the plurality of bit codes by the decoder when the first part of the plurality of bit codes meets a decoding table rule and a boundary detection rule.
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公开(公告)号：US11538380B2
公开(公告)日：2022-12-27
申请号：US16621734
申请日：2019-03-25
发明人： Xuehuan Feng
IPC分类号： G11C19/28 , G09G3/36 , G09G3/20 , G11C19/18 , G09G3/3266
摘要： A shift register, a driving method therefor, a gate driving circuit and a display device. The shift register comprises: an input module, a first reset module, a second reset module, an output module. The input module is configured to write input signal of a signal input terminal STU into second node Q2 through second clock signal terminal CLKB, and to connect Q2 with first node Q1 through STU. The first reset module is configured to write signal of first direct current signal terminal into third node Q3 through STU, and to write reset signal of reset signal terminal STD into Q3 and connect Q2 with Q1 through STD. The second reset module is configured to write a signal of the first direct current signal terminal into a signal output terminal OUT through Q3. The output module is configured to write a first clock signal of CLKA into OUT through Q1.
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公开(公告)号：US20220284976A1
公开(公告)日：2022-09-08
申请号：US17749309
申请日：2022-05-20
发明人： Seiko AMANO , Kouhei TOYOTAKA , Hiroyuki MIYAKE , Aya MIYAZAKI , Hideaki SHISHIDO , Koji KUSUNOKI
摘要： An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L, of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号：US11380412B2
公开(公告)日：2022-07-05
申请号：US17319156
申请日：2021-05-13
发明人： Atsushi Umezaki
IPC分类号： G11C19/18 , G09G3/3266 , G09G3/36 , H01L29/786 , H01L27/12
摘要： A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
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公开(公告)号：US20220005536A1
公开(公告)日：2022-01-06
申请号：US17480311
申请日：2021-09-21
摘要： A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.
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