A first chip includes a first plurality of optical waveguides exposed at a facet of the first chip. A second chip includes a second plurality of optical waveguides exposed at a facet of the second chip. The second chip includes first and second spacers on opposite sides of the second plurality of optical waveguides. The first and second spacers have respective alignment surfaces oriented substantially parallel to the facet of the second chip at a controlled perpendicular distance away from the facet of the second chip. The second chip is positioned with the alignment surfaces of the first and second spacers contacting the facet of the first chip, and with the second plurality of optical waveguides respectively aligned with the first plurality of optical waveguides. The first and second spacers define and maintain an air gap of at least micrometer-level precision between the first and second pluralities of optical waveguides.