This document describes techniques and systems for leakage screening based on power prediction. In particular, the described systems and techniques estimate, during a silicon manufacturing process, use-case power (e.g., low power, ambient power, high power, gaming power) to apply leakage screening for apart (e.g., a chip package). In some aspects, measurable silicon parameters (e.g., leakage values, bin values, processor sensor values) may be used for use-case power prediction. Using the described techniques, a maximum allowable predicted use-case power can be determined and used for leakage screening regardless of an individual rail leakage or voltage bin assignment.