Voltage based combining of block families for memory devices
Abstract:
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to identify a first block family comprising a first set of blocks, wherein the first block family comprises a plurality of blocks that have been programmed within at least one of a specified time window or a specified temperature window; identify a second block family comprising a second set of blocks; and responsive to a determining that a threshold criterion is satisfied, combine the first block family and the second block family by appending, to first block family metadata of the first block family, a record referencing the second set of blocks.
Public/Granted literature
Information query
Patent Agency Ranking
0/0