- 专利标题: Wear-leveling scheme for memory subsystems
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申请号: US17018636申请日: 2020-09-11
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公开(公告)号: US11768764B2公开(公告)日: 2023-09-26
- 发明人: Samuel E. Bradshaw , Justin Eno
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: MICRON TECHNOLOGY, INC.
- 当前专利权人: MICRON TECHNOLOGY, INC.
- 当前专利权人地址: US ID Boise
- 代理机构: NICHOLSON DE VOS WEBSTER & ELLIOTT LLP
- 主分类号: G06F12/02
- IPC分类号: G06F12/02 ; G06F3/06 ; G06F12/1009
摘要:
A wear-leveling process for a memory subsystem selects a source chunk to be removed from a usable address space of the memory subsystem to distribute wear across all available chunks in the memory subsystem. The memory subsystem has a plurality of non-volatile memory components. The plurality of non-volatile memory components includes a plurality of chunks including at least one chunk in an unusable address space of the memory subsystem. The wear-leveling process copies valid data of the source chunk to a destination chunk in the unusable address space of the memory subsystem and assigns the destination chunk to a location in the usable address space of the memory subsystem occupied by the source chunk.
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