Semiconductor package
Abstract:
A semiconductor package includes: a semiconductor chip including a chip pad on a first surface; a first insulating layer arranged on the semiconductor chip and including an insulating hole exposing the chip pad; a redistribution pattern including a redistribution via pattern arranged on an internal surface of the first insulating layer configured to define the first insulating hole and on a surface of the chip pad, and a redistribution line pattern arranged on a surface of the first insulating layer; an under bump metal (UBM) conformally arranged along a surface of the redistribution pattern; and a connection terminal arranged on the UBM, wherein the redistribution line pattern and the UBM provide a dummy space of a shape protruding in a direction toward the first surface of the semiconductor chip, and a portion of the connection terminal fills the dummy space.
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