A chip design method, a chip design device, a chip, and an electronic device are provided. The chip design method includes: determining at least one power state of the chip, one power state of the at least one power state including switch states of respective power domains on the chip in a chip operation mode, and the at least one power state including a first power state; determining control signals sent by changed power domains in the respective power domains in a case where a power state of the chip is switched to the first power state, in a case where the power state of the chip is switched to the first power state, switch states of the changed power domains changing; and analyzing timing dependency between the control signals to determine timing dependency between power domains to which the control signals act in the first power state.