Invention Grant
- Patent Title: DRAM, memory controller and associated training method
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Application No.: US17238000Application Date: 2021-04-22
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Publication No.: US11776613B2Publication Date: 2023-10-03
- Inventor: Bo-Wei Hsieh , Ching-Yeh Hsuan , Shang-Pin Chen
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MediaTek Inc.
- Current Assignee: MediaTek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: Wolf, Greenfield & Sacks, P.C.
- The original application number of the division: US15862884 2018.01.05
- Main IPC: G11C11/4076
- IPC: G11C11/4076 ; G11C11/4093 ; G11C11/408 ; G11C7/10

Abstract:
A training method for a memory system is provided. The memory system includes a memory controller and a memory. The memory controller is connected with the memory. The training method includes the following steps. Firstly, the memory samples n command/address signals according to a first signal edge and a second signal edge of a clock signal to acquire a first sampled content and a second sampled content. The memory selectively outputting one of the first sampled content and the second sampled content through m data signals to the memory controller in response to a control signal. Moreover, m is larger than n and smaller than 2n.
Public/Granted literature
- US20210295894A1 DRAM, MEMORY CONTROLLER AND ASSOCIATED TRAINING METHOD Public/Granted day:2021-09-23
Information query
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