A semiconductor package includes a substrate including a first semiconductor chip including a first wiring structure, a first bonding pad, and a first alignment key on the first wiring structure to be spaced apart in a first direction, a second semiconductor chip including a second wiring structure, a second bonding pad on the second wiring structure and connected to the first bonding pad, and a second alignment key on the second wiring structure to be spaced apart from the second bonding pad and not overlapping the first alignment key in the second direction, the first wiring structure including a first wiring pattern connected to the first bonding pad and not overlapping the first and second alignment keys in the second direction, and the second wiring structure including a second wiring pattern connected to the second bonding pad and not overlapping the first and second alignment keys in the second direction.