An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.