- 专利标题: Wafer scale testing using a 2 signal JTAG interface
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申请号: US18100178申请日: 2023-01-23
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公开(公告)号: US11782091B2公开(公告)日: 2023-10-10
- 发明人: Lee D. Whetsel
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Carl G. Peterson; Frank D. Cimino
- 分案原申请号: US17559444 2021.12.22
- 主分类号: G01R31/3177
- IPC分类号: G01R31/3177 ; G01R31/3185 ; G01R31/3187 ; G01R31/317 ; G06F1/3234 ; G01R31/28
摘要:
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuity, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.
公开/授权文献
- US20230160959A1 WAFER SCALE TESTING USING A 2 SIGNAL JTAG INTERFACE 公开/授权日:2023-05-25
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