- Patent Title: Transistors with ferroelectric spacer and methods of fabrication
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Application No.: US16457752Application Date: 2019-06-28
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Publication No.: US11784251B2Publication Date: 2023-10-10
- Inventor: Seung Hoon Sung , Gilbert Dewey , Abhishek Sharma , Van H. Le , Jack Kavalieros
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H10B61/00 ; H10B63/00

Abstract:
A transistor includes a semiconductor body including a material such as an amorphous or polycrystalline material, for example and a gate stack on a first portion of the body. The gate stack includes a gate dielectric on the body, and a gate electrode on the gate dielectric. The transistor further includes a first metallization structure on a second portion of the body and a third metallization structure on a third portion of the body, opposite to the second portion. The transistor further includes a ferroelectric material on at least a fourth portion of the body, where the ferroelectric material is between the gate stack and the first or second metallization structure.
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