A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.