Invention Grant
- Patent Title: Segregated power and ground design for yield improvement
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Application No.: US17461061Application Date: 2021-08-30
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Publication No.: US11804443B2Publication Date: 2023-10-31
- Inventor: Shu-Rong Chun , Tin-Hao Kuo , Chi-Hui Lai , Kuo Lung Pan , Yu-Chia Lai , Hao-Yi Tsai , Chung-Shi Liu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/31 ; H01L21/683 ; H01L21/48 ; H01L21/56

Abstract:
A method includes encapsulating a plurality of package components in an encapsulant, and forming a first plurality of redistribution layers over and electrically coupling to the plurality of package components. The first plurality of redistribution layers have a plurality of power/ground pad stacks, with each of the plurality of power/ground pad stacks having a pad in each of the first plurality of redistribution layers. The plurality of power/ground pad stacks include a plurality of power pad stacks, and a plurality of ground pad stacks. At least one second redistribution layer is formed over the first plurality of redistribution layers. The second redistribution layer(s) include power lines and electrical grounding lines electrically connecting to the plurality of power/ground pad stacks.
Public/Granted literature
- US20210391270A1 Segregated Power and Ground Design for Yield Improvement Public/Granted day:2021-12-16
Information query
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