Invention Grant
- Patent Title: Apparatus and method for providing a scalable ball grid array (BGA) assignment and a PCB circuit trace breakout pattern for RF chip interfaces
-
Application No.: US17364220Application Date: 2021-06-30
-
Publication No.: US11817378B2Publication Date: 2023-11-14
- Inventor: Nelly Chen , Gary Yao Zhang , Michael Randy May , Shrinivas Gopalan Uppili , Varin Sriboonlue
- Applicant: QUALCOMM INCORPORATED
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Smith Tempel Blaha LLC
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H01L23/498 ; H01L23/66 ; H05K3/34

Abstract:
A pin map covers a surface area of a layer of a printed circuit board (PCB). The pin map includes a plurality of electrical designations for each pin in the pin map and a plurality of empty spaces within the pin map. Each electrical designation may be assigned to a pin on the pin map. Each electrical designation includes a positive polarity (P+) pin, a negative polarity (P−) pin, or an electrical ground (G) pin. If a space in the pin map does not have an electrical designation, then it may include an empty space/plain portion of the printed circuit board (PCB). The pin map may include a plurality of rows and a first repeating pin polarity pattern. The first repeating pin polarity pattern may include a lane unit tile. The pin map may help couple two circuit elements together that are attached to one layer of a PCB.
Public/Granted literature
Information query