Invention Grant
- Patent Title: Latent read disturb mitigation in memory devices
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Application No.: US17212437Application Date: 2021-03-25
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Publication No.: US11847335B2Publication Date: 2023-12-19
- Inventor: Pitamber Shukla , Scott Anthony Stoller , Niccolo' Righetti , Giuseppina Puzzilli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F3/06
- IPC: G06F3/06
Abstract:
A trigger condition associated with latent read disturb in a memory device is detected. In response to detecting the trigger condition associated with latent read disturb, one or more blocks in the memory device that are impacted by the trigger condition are placed in a stable state to mitigate latent read disturb in the one or more blocks.
Public/Granted literature
- US20220308778A1 LATENT READ DISTURB MITIGATION IN MEMORY DEVICES Public/Granted day:2022-09-29
Information query
