Invention Grant
- Patent Title: Multi-chip semiconductor package
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Application No.: US17883878Application Date: 2022-08-09
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Publication No.: US11848319B2Publication Date: 2023-12-19
- Inventor: Yu-Chia Lai , Kuo Lung Pan , Hung-Yi Kuo , Tin-Hao Kuo , Hao-Yi Tsai , Chung-Shi Liu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16128034 2018.09.11
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L23/00 ; H01L25/00 ; H01L23/24 ; H01L23/31 ; H01L21/48

Abstract:
A semiconductor package includes a first die; a first redistribution structure over the first die, the first redistribution structure being conterminous with the first die; a second die over the first die, a first portion of the first die extending beyond a lateral extent of the second die; a conductive pillar over the first portion of the first die and laterally adjacent to the second die, the conductive pillar electrically coupled to first die; a molding material around the first die, the second die, and the conductive pillar; and a second redistribution structure over the molding material, the second redistribution structure electrically coupled to the conductive pillar and the second die.
Public/Granted literature
- US20220384411A1 Multi-Chip Semiconductor Package Public/Granted day:2022-12-01
Information query
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