Invention Grant
- Patent Title: Integrated circuits with buried interconnect conductors
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Application No.: US17869132Application Date: 2022-07-20
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Publication No.: US11854902B2Publication Date: 2023-12-26
- Inventor: Kuo-Cheng Chiang , Shi Ning Ju , Kuan-Lun Cheng , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: HAYNES AND BOONE, LLP
- The original application number of the division: US16288636 2019.02.28
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/78 ; H01L29/66 ; H01L21/768 ; H01L27/088

Abstract:
Examples of an integrated circuit with an interconnect structure that includes a buried interconnect conductor and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a substrate that includes a plurality of fins extending from a remainder of the substrate. A spacer layer is formed between the plurality of fins, and a buried interconnect conductor is formed on the spacer layer between the plurality of fins. A set of capping layers is formed on the buried interconnect conductor between the plurality of fins. A contact recess is etched through the set of capping layers that exposes the buried interconnect conductor, and a contact is formed in the contact recess that is electrically coupled to the buried interconnect conductor.
Public/Granted literature
- US20220359305A1 INTEGRATED CIRCUITS WITH BURIED INTERCONNECT CONDUCTORS Public/Granted day:2022-11-10
Information query
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