Invention Grant
- Patent Title: Semiconductor device having self-aligned interconnect structure and method of making
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Application No.: US17231527Application Date: 2021-04-15
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Publication No.: US11854940B2Publication Date: 2023-12-26
- Inventor: Chih-Yu Lai , Chih-Liang Chen , Chi-Yu Lu , Shang-Syuan Ciou , Hui-Zhong Zhuang , Ching-Wei Tsai , Shang-Wen Chang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768

Abstract:
A semiconductor device includes a substrate and a first transistor on a first side of the substrate. The semiconductor device further includes a first electrode contacting a first region of the first transistor. The semiconductor device further includes a spacer extending along a sidewall of the first transistor. The semiconductor device further includes a self-aligned interconnect structure (SIS) separated from at least a portion of the first electrode by the spacer, wherein the SIS extends through the substrate. The semiconductor device further includes a second electrode contacting a surface of the first electrode farthest from the substrate, wherein the second electrode directly contacts the SIS.
Public/Granted literature
- US20220336325A1 SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED INTERCONNECT STRUCTURE AND METHOD OF MAKING Public/Granted day:2022-10-20
Information query
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