Invention Grant
- Patent Title: Resistive and digital processing cores
-
Application No.: US17049031Application Date: 2018-04-30
-
Publication No.: US11861429B2Publication Date: 2024-01-02
- Inventor: John Paul Strachan , Dejan S. Milojicic , Martin Foltin , Sai Rahul Chalamalasetti , Amit S. Sharma
- Applicant: Hewlett Packard Enterprise Development LP
- Applicant Address: US TX Houston
- Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee Address: US TX Spring
- Agency: Hewlett Packard Enterprise Patent Department
- International Application: PCT/US2018/030125 2018.04.30
- International Announcement: WO2019/212466A 2019.11.07
- Date entered country: 2020-10-20
- Main IPC: G06J1/00
- IPC: G06J1/00 ; G06F17/16

Abstract:
In some examples, a device includes a first processing core comprising a resistive memory array to perform an analog computation, and a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions. The device further includes a controller to selectively apply input data to the first processing core and the digital processing core.
Public/Granted literature
- US20210240945A1 RESISTIVE AND DIGITAL PROCESSING CORES Public/Granted day:2021-08-05
Information query