A semiconductor memory device includes a first memory string including a first select transistor, a first memory cell, a first select element, a second memory cell, and a second select element in series, a second memory string including a second select transistor, a third memory cell, a third select element, a fourth memory cell, and a fourth select element in series, and a control circuit. The control circuit is configured to set the second select transistor to an on state, and to set the third select element and the fourth select element to an off state, when reading data of the first memory cell.