Invention Grant
- Patent Title: Semiconductor device having cavities at an interface of an encapsulant and a die pad or leads
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Application No.: US17845867Application Date: 2022-06-21
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Publication No.: US11862579B2Publication Date: 2024-01-02
- Inventor: Ian Harvey Arellano
- Applicant: STMICROELECTRONICS, INC.
- Applicant Address: PH Calamba
- Assignee: STMicroelectronics, Inc.
- Current Assignee: STMicroelectronics, Inc.
- Current Assignee Address: US TX Coppell
- Agency: Seed IP Law Group LLP
- The original application number of the division: US16996712 2020.08.18
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L21/48

Abstract:
In various embodiments, the present disclosure provides semiconductor devices, packages, and methods. In one embodiment, a device includes a die pad, a lead that is spaced apart from the die pad, and an encapsulant on the die pad and the lead. A plurality of cavities extends into at least one of the die pad or the lead to a depth from a surface of the at least one of the die pad or the lead. The depth is within a range from 0.5 μm to 5 μm. The encapsulant extends into the plurality of cavities. The cavities facilitate improved adhesion between the die pad or lead and the encapsulant, as the cavities increase a surface area of contact with the encapsulant, and further increase a mechanical interlock with the encapsulant, as the cavities may have a rounded or semi-spherical shape.
Public/Granted literature
- US20220320014A1 SEMICONDUCTOR DEVICE HAVING CAVITIES AT AN INTERFACE OF AN ENCAPSULANT AND A DIE PAD OR LEADS Public/Granted day:2022-10-06
Information query
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