Invention Grant
- Patent Title: Tie off device
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Application No.: US16879166Application Date: 2020-05-20
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Publication No.: US11862637B2Publication Date: 2024-01-02
- Inventor: Shao-Lun Chien , Ting-Wei Chiang , Hui-Zhong Zhuang , Pin-Dai Sue
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: MERCHANT & GOULD P.C.
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L27/088 ; H01L21/8234 ; H01L23/528 ; H01L23/522 ; H01L21/765 ; H01L21/8238

Abstract:
An integrated circuit device includes a first power rail, a first active area extending in a first direction, and a plurality of gates contacting the first active area and extending in a second direction perpendicular to the first direction. A first transistor includes the first active area and a first one of the gates. The first transistor has a first threshold voltage (VT). A second transistor includes the first active area and a second one of the gates. The second transistor has a second VT different than the first VT. A tie-off transistor is positioned between the first transistor and the second transistor, and includes the first active area and a third one of the gates, wherein the third gate is connected to the first power rail.
Information query
IPC分类: