Invention Grant
- Patent Title: Mechanism to efficiently rinse memory-side cache of dirty data
-
Application No.: US17031834Application Date: 2020-09-24
-
Publication No.: US11874774B2Publication Date: 2024-01-16
- Inventor: Ravindra N. Bhargava , Ganesh Balakrishnan , Joe Sargunaraj , Chintan S. Patel , Girish Balaiah Aswathaiya , Vydhyanathan Kalyanasundharam
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: FIG. 1 Patents
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0891 ; G06F9/46 ; G06F12/0813 ; G06F12/0831 ; G06F12/084

Abstract:
A method includes, in response to each write request of a plurality of write requests received at a memory-side cache device coupled with a memory device, writing payload data specified by the write request to the memory-side cache device, and when a first bandwidth availability condition is satisfied, performing a cache write-through by writing the payload data to the memory device, and recording an indication that the payload data written to the memory-side cache device matches the payload data written to the memory device.
Public/Granted literature
- US20220091991A1 MECHANISM TO EFFICIENTLY RINSE MEMORY-SIDE CACHE OF DIRTY DATA Public/Granted day:2022-03-24
Information query