Invention Grant
- Patent Title: Screening of memory circuits
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Application No.: US18148312Application Date: 2022-12-29
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Publication No.: US11881275B2Publication Date: 2024-01-23
- Inventor: Francisco Adolfo Cano , Devanathan Varadarajan , Anthony Martin Hill
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Michael T. Gabrik; Frank D. Cimino
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/38 ; G11C29/50 ; G11C11/419 ; G11C11/418 ; G11C11/412

Abstract:
Systems of screening memory cells of a memory include modulating bitline and/or wordline voltage. In a read operation, the wordline may be overdriven or underdriven with respect to a nominal operating voltage on the wordline. In a write operation, one or both of the bitline and wordline may be overdriven or underdriven with respect to corresponding a nominal operating voltage. Such a system has margin control circuity, which may be in the form of bitline and wordline margin controls, to modulate bitline and wordline voltages, respectively, in the memory cells of the memory array.
Public/Granted literature
- US20230146764A1 SCREENING OF MEMORY CIRCUITS Public/Granted day:2023-05-11
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