Invention Grant
- Patent Title: Block family-based error avoidance for memory devices
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Application No.: US17542943Application Date: 2021-12-06
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Publication No.: US11886726B2Publication Date: 2024-01-30
- Inventor: Michael Sheperek , Kishore Kumar Muchherla , Mustafa N. Kaynak , Vamsi Pavan Rayaprolu , Bruce A. Liikanen , Peter Feeley , Larry J. Koudele , Shane Nowell , Steven Michael Kientz
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F12/10 ; G11C16/26 ; G11C16/04

Abstract:
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.
Public/Granted literature
- US20220091741A1 BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES Public/Granted day:2022-03-24
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