- 专利标题： Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction
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申请号： US17458407申请日： 2021-08-26
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公开(公告)号： US11886883B2公开(公告)日： 2024-01-30
- 发明人: Nicholas R. Orzol , Mehul Patel , Dung Q. Nguyen , Brian D. Barrick , Richard J. Eickemeyer , John B Griswell, Jr. , Balaram Sinharoy , Brian W. Thompto , Ophir Erez
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 代理机构： Intelletek Law Group, PLLC
- 代理商 Gabriel Daniel, Esq.
- 主分类号： G06F9/30
- IPC分类号： G06F9/30 ; G06F9/38
摘要：
A method of performing instructions in a computer processor architecture includes determining that a load instruction is being dispatched. Destination related data of the load instruction is written into a mapper of the architecture. A determination that a compare immediate instruction is being dispatched is made. A determination that a branch conditional instruction is being dispatched is made. The branch conditional instruction is configured to wait until the load instruction produces a result before the branch conditional instruction issues and executes. The branch conditional instruction skips waiting for a finish of the compare immediate instruction.
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