Invention Grant
- Patent Title: Techniques for configuring a processor to function as multiple, separate processors
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Application No.: US16562367Application Date: 2019-09-05
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Publication No.: US11893423B2Publication Date: 2024-02-06
- Inventor: Jerome F. Duluk, Jr. , Gregory Scott Palmer , Jonathon Stuart Ramsey Evans , Shailendra Singh , Samuel H. Duncan , Wishwesh Anil Gandhi , Lacky V. Shah , Sonata Gale Wen , Feiqi Su , James Leroy Deming , Alan Menezes , Pranav Vaidya , Praveen Joginipally , Timothy John Purcell , Manas Mandal
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06F9/50
- IPC: G06F9/50 ; G06F9/38 ; G06F1/3296 ; G06F1/04

Abstract:
A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.
Public/Granted literature
- US20210073042A1 TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEPARATE PROCESSORS Public/Granted day:2021-03-11
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