公开(公告)号：US11635986B2

公开(公告)日：2023-04-25

申请号：US16562359

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. Duluk, Jr. ,  Gregory Scott Palmer ,  Jonathon Stuart Ramsey Evans ,  Shailendra Singh ,  Samuel H. Duncan ,  Wishwesh Anil Gandhi ,  Lacky V. Shah ,  Eric Rock ,  Feiqi Su ,  James Leroy Deming ,  Alan Menezes ,  Pranav Vaidya ,  Praveen Joginipally ,  Timothy John Purcell ,  Manas Mandal

IPC: G06F9/48 ,  G06F9/46 ,  G06T1/20

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US11893423B2

公开(公告)日：2024-02-06

申请号：US16562367

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. Duluk, Jr. ,  Gregory Scott Palmer ,  Jonathon Stuart Ramsey Evans ,  Shailendra Singh ,  Samuel H. Duncan ,  Wishwesh Anil Gandhi ,  Lacky V. Shah ,  Sonata Gale Wen ,  Feiqi Su ,  James Leroy Deming ,  Alan Menezes ,  Pranav Vaidya ,  Praveen Joginipally ,  Timothy John Purcell ,  Manas Mandal

IPC: G06F9/50 ,  G06F9/38 ,  G06F1/3296 ,  G06F1/04

CPC classification number: G06F9/5061 ,  G06F1/04 ,  G06F1/3296 ,  G06F9/3877 ,  G06F9/5027

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US11663036B2

公开(公告)日：2023-05-30

申请号：US16562359

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. Duluk, Jr. ,  Gregory Scott Palmer ,  Jonathon Stuart Ramsey Evans ,  Shailendra Singh ,  Samuel H. Duncan ,  Wishwesh Anil Gandhi ,  Lacky V. Shah ,  Eric Rock ,  Feiqi Su ,  James Leroy Deming ,  Alan Menezes ,  Pranav Vaidya ,  Praveen Joginipally ,  Timothy John Purcell ,  Manas Mandal

IPC: G06F9/48 ,  G06F9/46 ,  G06T1/20

CPC classification number: G06F9/485 ,  G06F9/461 ,  G06T1/20

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US11579925B2

公开(公告)日：2023-02-14

申请号：US16562364

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. Duluk, Jr. ,  Gregory Scott Palmer ,  Jonathon Stuart Ramsey Evans ,  Shailendra Singh ,  Samuel H. Duncan ,  Wishwesh Anil Gandhi ,  Lacky V. Shah ,  Eric Rock ,  Feiqi Su ,  James Leroy Deming ,  Alan Menezes ,  Pranav Vaidya ,  Praveen Joginipally ,  Timothy John Purcell ,  Manas Mandal

IPC: G06F9/46 ,  G06F9/50

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.

公开(公告)号：US11249905B2

公开(公告)日：2022-02-15

申请号：US16562361

申请日：2019-09-05

Applicant: NVIDIA CORPORATION

Inventor： Jerome F. Duluk, Jr. ,  Gregory Scott Palmer ,  Jonathon Stuart Ramsey Evans ,  Shailendra Singh ,  Samuel H. Duncan ,  Wishwesh Anil Gandhi ,  Lacky V. Shah ,  Eric Rock ,  Feiqi Su ,  James Leroy Deming ,  Alan Menezes ,  Pranav Vaidya ,  Praveen Joginipally ,  Timothy John Purcell ,  Manas Mandal

IPC: G06F12/06 ,  G06F9/50

Abstract: A parallel processing unit (PPU) can be divided into partitions. Each partition is configured to operate similarly to how the entire PPU operates. A given partition includes a subset of the computational and memory resources associated with the entire PPU. Software that executes on a CPU partitions the PPU for an admin user. A guest user is assigned to a partition and can perform processing tasks within that partition in isolation from any other guest users assigned to any other partitions. Because the PPU can be divided into isolated partitions, multiple CPU processes can efficiently utilize PPU resources.