Invention Grant
- Patent Title: Semiconductor device assembly with sacrificial pillars and methods of manufacturing sacrificial pillars
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Application No.: US17809224Application Date: 2022-06-27
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Publication No.: US11894329B2Publication Date: 2024-02-06
- Inventor: Chao Wen Wang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- The original application number of the division: US16916325 2020.06.30
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00

Abstract:
Sacrificial pillars for a semiconductor device assembly, and associated methods and systems are disclosed. In one embodiment, a region of a semiconductor die may be identified to include sacrificial pillars that are not connected to bond pads of the semiconductor die, in addition to live conductive pillars connected to the bond pads. The region with the sacrificial pillars, when disposed in proximity to the live conductive pillars, may prevent an areal density of the live conductive pillars from experiencing an abrupt change that may result in intolerable variations in heights of the live conductive pillars. As such, the sacrificial pillars may improve a coplanarity of the live conductive pillars by reducing variations in the heights of the live conductive pillars. Thereafter, the sacrificial pillars may be removed from the semiconductor die.
Public/Granted literature
- US20220328442A1 SEMICONDUCTOR DEVICE ASSEMBLY WITH SACRIFICIAL PILLARS AND METHODS OF MANUFACTURING SACRIFICIAL PILLARS Public/Granted day:2022-10-13
Information query
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