- 专利标题: Multi-page parity data storage in a memory device
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申请号: US18098279申请日: 2023-01-18
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公开(公告)号: US11928353B2公开(公告)日: 2024-03-12
- 发明人: Harish R Singidi , Ashutosh Malshe , Vamsi Pavan Rayaprolu , Kishore Kumar Muchherla
- 申请人: MICRON TECHNOLOGY, INC.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Lowenstein Sandler LLP
- 主分类号: G06F3/06
- IPC分类号: G06F3/06 ; G06F11/10 ; H03M7/30
摘要:
A processing device, operatively coupled with a memory device, is configured to perform a write operation on a page of a plurality of pages of a data unit of a memory device. The processing device further generates a parity page for data stored in the page of the data unit and associates the parity page with parity data associated with the data unit. Responsive to determining that a first size of the parity data is larger than a first threshold size, the processing device compresses the parity data. Responsive to determining that a second size of the compressed parity data is larger than a second threshold size, the processing device releases at least a subset of the parity data corresponding to a subset of the data that is free from defects.
公开/授权文献
- US20230153011A1 MULTI-PAGE PARITY DATA STORAGE IN A MEMORY DEVICE 公开/授权日:2023-05-18
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