- 专利标题: Display device and manufacturing method thereof
-
申请号: US17740646申请日: 2022-05-10
-
公开(公告)号: US11935896B2公开(公告)日: 2024-03-19
- 发明人: Shunpei Yamazaki
- 申请人: Semiconductor Energy Laboratory Co., Ltd.
- 申请人地址: JP Atsugi
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Atsugi
- 代理机构: Fish & Richardson P.C.
- 优先权: JP 10012663 2010.01.24
- 分案原申请号: US14833391 2015.08.24
- 主分类号: G02F1/136
- IPC分类号: G02F1/136 ; G02F1/1333 ; G02F1/1343 ; G02F1/1362 ; G02F1/1368 ; G09G3/34 ; G09G3/36 ; H01L27/12 ; H01L27/15 ; H01L29/04 ; H01L29/12 ; H01L29/24 ; H01L29/66 ; H01L29/786 ; H01L33/00 ; G02F1/13357 ; H10K59/121
摘要:
Disclosed is a display device including a transistor showing extremely low off current. In order to reduce the off current, a semiconductor material whose band gap is greater than that of a silicon semiconductor is used for forming a transistor, and the concentration of an impurity which serves as a carrier donor of the semiconductor material is reduced. Specifically, an oxide semiconductor whose band gap is greater than or equal to 2 eV, preferably greater than or equal to 2.5 eV, more preferably greater than or equal to 3 eV is used for a semiconductor layer of a transistor, and the concentration of an impurity which serves as a carrier donor included is reduced. Consequently, the off current of the transistor per micrometer in channel width can be reduced to lower than 10 zA/μm at room temperature and lower than 100 zA/μm at 85° C.
公开/授权文献
- US20220271063A1 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 公开/授权日:2022-08-25
信息查询
IPC分类: