Disclosed herein is an apparatus that includes: a semiconductor substrate including first and second source regions coupled to a first power supply line and first and second drain regions coupled to a second power supply line, the first drain region being arranged between the first and second source regions, the second source region being arranged between the first and second drain regions; and gate electrodes including a first gate electrode arranged between the first source region and the first drain region, a second gate electrode arranged between the first drain region and the second source region, and a third gate electrode arranged between the second source region and the second drain region. The first and third gate electrodes are supplied with a first control signal. The second gate electrode is supplied with a second control signal.