- 专利标题: Method for fabricating a doped region of a microelectronic device
-
申请号: US17455425申请日: 2021-11-18
-
公开(公告)号: US11967633B2公开(公告)日: 2024-04-23
- 发明人: Shay Reboh
- 申请人: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- 申请人地址: FR Paris
- 专利权人: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- 当前专利权人: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- 当前专利权人地址: FR Paris
- 代理机构: Oblon, McClelland, Maier & Neustadt, L.L.P.
- 优先权: FR 11824 2020.11.18
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L21/02 ; H01L21/225 ; H01L29/08
摘要:
A method for forming at least one doped region of a transistor includes providing a stack having an insulating layer, an active layer, and a gate pattern having a first lateral flank and removing a first portion of the active layer not overlaid by the gate pattern and extending down to the gate pattern, at the edge of a second portion of the active layer overlaid by the gate pattern, so as to expose an edge of the second portion. The edge extends substantially in a continuation of the lateral flank of the gate pattern. The method also includes forming a first spacer having an L shape and having a basal portion in contact with the insulating layer and a lateral portion in contact with the lateral flank; forming a second spacer on the first spacer; removing the basal portion of the first spacer by selective etching with respect to the second spacer, so as to expose the edge of the second portion; and forming the doped region by epitaxy from the exposed edge.
公开/授权文献
信息查询
IPC分类: